Data storage devices, such as a static random access memory (SRAM), could have the content of their storage elements cleared by a clear operation during an initialization, a power-up operation or at other times. One known implementation of a memory storage element is a cross-coupled inverter pair in which an output of a first inverter is connected to an input of a second inverter and the output of the second inverter is connected to the input of the first inverter. The cross-coupled inverter pair has two data storage nodes. A first data storage node is at the input of the first inverter and the second data storage node is at the output of the first inverter. As a result, a data bit is stored in a true and complement form. The data bit is cleared to a zero (or one) bit value by forcing one of the two forms of the data bit to a ground potential. A clear line conductor is implemented across a column of memory storage elements.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.